1. Field of the Invention
This invention relates generally to electronic memory devices, and more particularly to a method of inducing a non-phase change stack structure into a phase change stack memory structure.
2. Related Art
Research into new random access electronic memory technologies has grown significantly in the past 10 years due to the near realization of the scaling limits of DRAM and the low cycle lifetime, high power requirements, and radiation sensitivity of Flash. At the forefront of this research is the phase-change random access memory (PCRAM) [see Bez, R.; Pirovano, A. “Non-volatile memory technologies: emerging concepts and new materials” Materials Science in Semiconductor Processing 7 (2004) 349-355; and Lacaita, A. L. “Phase-change memories: state-of-the-art, challenges and perspectives” Solid-State Electronics 50 (2006) 24-31]. Phase-change memory is a non-volatile, resistance variable memory technology whereby the state of the memory bit is defined by the memory material's resistance. Typically, in a two state device, a high resistance defines a logic ‘0’ (or ‘OFF’ state) and corresponds to an amorphous phase of the material. The logic ‘1’ (‘ON’ state) corresponds to the low resistance of a crystalline phase of the material. The ‘high’ and ‘low’ resistances actually correspond to non-overlapping resistance distributions, rather than single, well-defined resistance values (FIG. 1).
The phase-change material is switched from high resistance to a low resistance state when a voltage higher than a ‘threshold’ voltage, Vt, is applied to the amorphous material [see Adler, D.; Henisch, H. K.; Mott, N. “The Mechanism of Threshold Switching in Amorphous Alloys” Reviews of Modern Physics 50 (1978) 209-220; and Adler, D. “Switching Phenomena in Thin Films” J. Vac. Sci. Technol. 10 (1973) 728-738] causing the resistance to significantly decrease (FIG. 2). The resultant increased current flow causes Joule heating of the material to a temperature above the material glass transition temperature. When a temperature above the glass transition temperature, but below the melting temperature, has been reached, the current is removed slowly enough to allow the material to cool and crystallize into a low resistance state (‘write 1’ current region, FIG. 2). The device can be returned to an amorphous state by allowing more current through the device, thus heating the material above the melting temperature, and then quickly removing the current to quench the material into an amorphous, high resistance state (‘write 0’ current region, FIG. 2).
Chalcogenide materials, those containing S, Se, or Te, have been the most widely investigated materials for electronic resistance variable memory applications since the discovery of the electronic resistance switching effect in a chalcogenide material (As30Te48Si12Ge10) by Ovshinsky almost 40 years ago [see Ovshinsky, S. R. “Reversible Electrical Switching Phenomena in Disordered Structures” Phys. Rev. Lett. 21 (1968), 1450-1453]. Chalcogenide materials are desirable for use in electronic memories due to the wide range of glasses they can form and the corresponding wide variety of glass transition and melting temperatures. One of the most well studied resistance switching chalcogenide materials is the Ge2Sb2Te5 (GST) alloy [see Bez, R.; Pirovano, A. “Non-volatile memory technologies: emerging concepts and new materials” Materials Science in Semiconductor Processing 7 (2004) 349-355; and Hudgens, S.; Johnson, B. “Overview of Phase-Change Chalcogenide Nonvolatile memory Technology” MRS Bulletin, November 2004, 829-832]. GST has been used successfully in phase-change memory arrays [see Storey, T.; Hunt, K. K.; Graziano, M.; Li, B.; Bumgarner, A.; Rodgers, J.; Burcin, L. “Characterization of the 4 Mb Chalcogenide-Random Access Memory” IEEE Non-Volatile Memory Technology Symposium (2005) 97-104; and Cho, W. Y.; Cho, B.-H.; Choi, B.-G.; Oh, H.-R.; Kang, S.; Kim, K.-S.; Kim. K.-H.; Kim, E-E.; Kwak, C.-K.; Byun, H.-G.; Hwang, Y.; Ahn, S.; Koh, G.-H.; Jeong, G.; Jeong, H.; Kim, K. “A 0.18-um 3.0-V 64-Mb nonvolatile phase-transition random access memory (PRAM)” IEEE J Solid-State Circuits 40 (2005) 293-300] but there have been many challenges to the implementation of a phase-change memory product such as the high programming current requirements, variation in switching voltages and ON/OFF resistance ratios, thermal stresses on the materials, and their adhesion to the electrodes. See also U.S. Patent Publication 2007/0029537 A1.